Calterah Semiconductor’s automotive radar SoC enters mass production using Synopsys DesignWare ARC processor IP

Calterah's new Alps chip series includes four transmitter channels at most, four receiver channels, a highly configurable waveform generator, and an integrated analog-to-digital converter with sampling rates up to 50 MSPS

Synopsys, Inc. (Nasdaq: SNPS) and Calterah Semiconductor today announced that Calterah’s new-generation advanced CMOS millimeter wave (MMW) radar system-on-chip (SoC) integrating Synopsys’ DesignWare® ARC® EM Processor IP has entered mass production. Calterah implemented an ISO 26262 functional safety development process to help ensure the Alps chip series met the standard’s ASIL B requirements for automotive safety. This included conducting functional safety-related monitoring and detection on more than 190 blocks in the design and analyzing over 1,000 failure modes, leading to the development of dozens of chip-level safety mechanisms. By using Synopsys’ ASIL-compliant ARC EM6 Processor, Calterah successfully reached its target functional safety ASIL level while enhancing overall processing performance and power efficiency for its Alps automotive radar SoC.

“Calterah’s new-generation Alps 77/79 GHz chip series boasts higher speed, flexibility, user-friendliness and reliability to deliver more competitive chip solutions for automotive millimeter wave radar,” said Hongquan Liu, chief marketing officer at Calterah Semiconductor. “With Synopsys’ functional safety-compliant ARC EM Processor IP, Calterah will continue providing its global users with higher-performance, easier-to-use and lower-power MMW radar technology to create a safer, smarter environment for drivers and their passengers.”

Calterah’s Alps chip series includes four transmitter channels at most, four receiver channels, a highly configurable waveform generator, and an analog-to-digital converter with sampling rates of up to 50 million of samples per second (MSPS). The complete, efficient signal processing baseband implements classical radar algorithms in hardware, saving development resources and delivering a solution with lower power consumption and higher performance. In addition to the conventional embedded wafer-level ball grid array (eWLB) package, the Alps chip series also includes an Antenna in Package (AiP) solution, which greatly reduces the difficulty and cost of radar development by integrating the antenna onto the chip packaging layer. This diverse lineup of next-generation products provides users with a complete set of solutions covering long-range, medium-range, short-range, and ultra-short-range radar solutions.

Synopsys offers a broad portfolio of automotive-grade DesignWare IP that is ASIL ready, is ISO 26262 certified, meets stringent AEC-Q100 reliability standards, and supports automotive quality management to help accelerate the development of ADAS, connected vehicle and infotainment, and MCU designs. The ASIL-compliant DesignWare ARC EM Processor integrates hardware safety features and safety monitors to detect system errors.

“Advanced automotive ADAS SoCs require massive amounts of data processing to accommodate a range of functions such as radar, LiDAR and sensor,” said John Koeter, senior vice president of marketing for IP at Synopsys. “Synopsys provides companies such as Calterah with the industry’s broadest portfolio of silicon-proven, ASIL Ready IP including differentiated ARC Processors that address the functional safety, reliability and quality requirements of automotive systems.”

SOURCE: Synopsys

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